From 410a868f79165d6d2559bc8508ba496450fbe1ee Mon Sep 17 00:00:00 2001 From: Nick McKinney Date: Thu, 29 Dec 2016 15:54:36 -0600 Subject: widen register set control signal, fix bugs with conditional sets related to branching --- ctrl_decode.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ctrl_decode.v') diff --git a/ctrl_decode.v b/ctrl_decode.v index cda670d..ede591f 100644 --- a/ctrl_decode.v +++ b/ctrl_decode.v @@ -1,5 +1,5 @@ module ctrl_decode ( - input [31:0] control_signals, + input [32:0] control_signals, output [3:0] aluOp, output [2:0] aluReg1, @@ -18,7 +18,7 @@ module ctrl_decode ( output memWriteB, output memWriteW, - output [4:0] setRegCond // {should set when condition is true, Z doesn't matter, S doesn't matter, Z must be this, S must be this} + output [5:0] setRegCond // {should set when condition is true, Z doesn't matter, S doesn't matter, Z must be this, S must be this} ); assign { -- cgit v1.2.3