diff options
author | Nick McKinney <nick@kmonkey.net> | 2016-12-29 17:14:54 -0600 |
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committer | Nick McKinney <nick@kmonkey.net> | 2016-12-29 17:14:54 -0600 |
commit | 7dbdb22c04ab8cb0302b7093ae1bfed976f262b8 (patch) | |
tree | b72dde7eef78836ae796214cc01d15a5e6844b83 | |
parent | 32edc0eea4ea03239cfa083fb85693191cda240b (diff) |
replace fetch_ready with a "wait needed" input line
-rw-r--r-- | control_unit.v | 14 | ||||
-rw-r--r-- | nqcpu.v | 2 |
2 files changed, 9 insertions, 7 deletions
diff --git a/control_unit.v b/control_unit.v index 00ebd4f..fa652e0 100644 --- a/control_unit.v +++ b/control_unit.v @@ -1,7 +1,7 @@ module control_unit ( input clk, - input fetch_ready, + input needWait, output fetch_en, output decode_en, @@ -25,11 +25,13 @@ module control_unit ( assign incr_pc = current_state[1]; always @(posedge clk) begin - case(current_state) - 10'b1: if(fetch_ready) current_state <= 10'b10; - 10'b10: current_state <= 10'b100; - 10'b100: current_state <= 10'b1; - endcase + if(!needWait) begin + case(current_state) + 10'b1: current_state <= 10'b10; + 10'b10: current_state <= 10'b100; + 10'b100: current_state <= 10'b1; + endcase + end end assign dbg_state = current_state; @@ -150,7 +150,7 @@ module nqcpu ( control_unit control_unit_inst ( .clk(clk), - .fetch_ready(fetch_ready), + .needWait(fetch_en & !fetch_ready), .fetch_en(fetch_en), .decode_en(decode_en), |