diff options
| -rw-r--r-- | alu_tb.v | 3 | ||||
| -rw-r--r-- | regFile_tb.v | 4 | ||||
| -rw-r--r-- | shifter_tb.v | 4 | ||||
| -rw-r--r-- | testbench.vh | 6 |
4 files changed, 11 insertions, 6 deletions
@@ -16,8 +16,7 @@ module alu_tb (); integer file, r; initial begin - $dumpfile("alu_tb.vcd"); - $dumpvars(0, alu_tb); + `DUMPWAVE(alu_tb) file = $fopenr("tests/alu"); diff --git a/regFile_tb.v b/regFile_tb.v index 0df3e48..d0da481 100644 --- a/regFile_tb.v +++ b/regFile_tb.v @@ -1,3 +1,4 @@ +`include "testbench.vh" `timescale 1 ns / 100 ps module regFile_tb (); @@ -12,8 +13,7 @@ module regFile_tb (); wire [15:0] dataB; initial begin - $dumpfile("regFile_tb.vcd"); - $dumpvars(0, regFile_tb); + `DUMPWAVE(regFile_tb) clk = 1'b0; diff --git a/shifter_tb.v b/shifter_tb.v index f586d02..5e25028 100644 --- a/shifter_tb.v +++ b/shifter_tb.v @@ -1,3 +1,4 @@ +`include "testbench.vh" `timescale 1 ns / 100 ps module shifter_tb (); @@ -11,8 +12,7 @@ module shifter_tb (); // xxxxxxxxxxxxxxxx1111101000001010xxxxxxxxxxxxxxxx initial begin - $dumpfile("shifter_tb.vcd"); - $dumpvars(0, shifter_tb); + `DUMPWAVE(shifter_tb) v = 16'hFA0A; by = 16'h0; diff --git a/testbench.vh b/testbench.vh index 9838164..c60f66d 100644 --- a/testbench.vh +++ b/testbench.vh @@ -4,6 +4,12 @@ `define MAX_LINE_LENGTH 128 `define EOF 32'hFFFF_FFFF +`define STRINGIFY(x) `"x`" + +`define DUMPWAVE(m) \ + $dumpfile({`STRINGIFY(m), ".vcd"}); \ + $dumpvars(0, m); + task skip_comments(input integer file); integer c, r, quit; reg [8*`MAX_LINE_LENGTH:0] line; |