| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | add containing SoC module, pull test program memory out of CPU | Nick McKinney | 2016-12-29 | 1 | -46/+28 |
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| * | replace fetch_ready with a "wait needed" input line | Nick McKinney | 2016-12-29 | 1 | -1/+1 |
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| * | watch control lines from decoder instead of ALU | Nick McKinney | 2016-12-29 | 1 | -1/+1 |
| | | | | | makes more sense in the simulator output | ||||
| * | support setting PC for branch and jump instructions | Nick McKinney | 2016-12-29 | 1 | -3/+14 |
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| * | add simplistic status register and associated debug lines | Nick McKinney | 2016-12-29 | 1 | -2/+6 |
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| * | widen register set control signal, fix bugs with conditional sets related to ↵ | Nick McKinney | 2016-12-29 | 1 | -3/+3 |
| | | | | | branching | ||||
| * | add simple control unit | Nick McKinney | 2016-12-18 | 1 | -5/+22 |
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| * | Add ALU stage and hook it up. It sort of works. | Nick McKinney | 2016-12-18 | 1 | -0/+158 |
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index : nqcpu | |
| a small 16-bit cpu |
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