From 8d316df61f4b01b6fcd8ca211faa6cb146127528 Mon Sep 17 00:00:00 2001 From: Bobby Bingham Date: Sun, 8 Jan 2017 19:12:36 -0600 Subject: Add synthesis for ICE40 targets --- .gitignore | 1 + Makefile | 12 +++++++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index 9f4d323..0e46f7c 100644 --- a/.gitignore +++ b/.gitignore @@ -15,4 +15,5 @@ greybox_tmp/ # ignores for the makefile build system waves/ sims/ +ice40/ .*.swp diff --git a/Makefile b/Makefile index dca5e74..ed56a85 100644 --- a/Makefile +++ b/Makefile @@ -4,7 +4,11 @@ IVFLAGS := -g2005-sv SIM_SRCS := $(wildcard *_tb.v) SIMS := $(addprefix sims/,$(SIM_SRCS:.v=.sim)) WAVES := $(addprefix waves/,$(SIM_SRCS:.v=.vcd)) -DIRS := sims waves + +SYNTH_SRCS := $(filter-out %_tb.v,$(wildcard *.v)) +SYNTH_ICE40 := $(addprefix ice40/,$(SYNTH_SRCS:.v=.blif)) + +DIRS := sims waves ice40 DEPS = $(sort $(1) $(foreach d,$(1),$(DEPS-$(d)))) DEPS-alu := $(call DEPS,shifter) @@ -17,6 +21,8 @@ all: simulate simulate: $(WAVES) +synth-ice40: $(SYNTH_ICE40) + clean: rm -rf $(DIRS) @@ -28,6 +34,10 @@ waves/%.vcd: sims/%.sim | waves .SECONDEXPANSION: pc := % + +ice40/%.blif: %.v $$(patsubst $$(pc),$$(pc).v,$$(DEPS-$$*)) | ice40 + yosys $(foreach v,$^,-p "read_verilog $v") -p "synth_ice40 -blif $@" | sed -e "1,/Printing statistics/d" -e "/Executing CHECK/,$$ d" | tee ice40/$*.size + sims/%_tb.sim: %_tb.v %.v testbench.vh $$(patsubst $$(pc),$$(pc).v,$$(DEPS-$$*)) | sims $(IV) $(IVFLAGS) -o $@ $(filter-out %.vh,$^) -- cgit v1.2.3