From 17f5cbe781ae761d86d55fec7d46ba3172167894 Mon Sep 17 00:00:00 2001
From: Bobby Bingham <koorogi@koorogi.info>
Date: Sun, 8 Jan 2017 21:58:16 -0600
Subject: Add carry input to ALU

---
 alu.v | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'alu.v')

diff --git a/alu.v b/alu.v
index 63812a7..37a84d5 100644
--- a/alu.v
+++ b/alu.v
@@ -2,6 +2,7 @@ module alu (
 	input [3:0] op,
 	input [15:0] x,
 	input [15:0] y,
+	input carry_in,
 	output [15:0] result,
 	output zero,
 	output carry
@@ -36,7 +37,7 @@ module alu (
 
 	assign issum = ~|(op[3:1]);
 
-	assign sum = x + (op[0] ? ~y + 1 : y);
+	assign sum = x + ({16{op[0]}} ^ y) + (op[0] ^ carry_in);
 	assign prod = x * y;
 	assign quot = x / y;
 	assign anded = x & y;
@@ -62,6 +63,6 @@ module alu (
 		shifted;
 
 	assign zero = ~(|result);
-	assign carry = issum ? sum[16] : 1'b0;
+	assign carry = issum ? op[0] ^ sum[16] : 1'b0;
 
 endmodule
-- 
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