From ad9b6505e537155f76afaecf8f3068e1de63e569 Mon Sep 17 00:00:00 2001 From: Bobby Bingham Date: Sun, 8 Jan 2017 23:35:53 -0600 Subject: Remove ~reg second operand source This was only used by the notneg instruction, which no longer needs it after having been reimplemented in terms of subtraction. --- alu_stage.v | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'alu_stage.v') diff --git a/alu_stage.v b/alu_stage.v index 92c8246..618cc89 100644 --- a/alu_stage.v +++ b/alu_stage.v @@ -58,7 +58,7 @@ module alu_stage ( .aluReg1(aluReg1_in), .aluReg2(aluReg2_in), .aluOpSource1(aluOpSource1_in), // ALU first operand: 0 = reg, 1 = memory read, 2 = imm8, 3 = PC - .aluOpSource2(aluOpSource2_in), // ALU second operand: 0 = reg, 1 = ~reg, 2 = PC, 3 = ??? + .aluOpSource2(aluOpSource2_in), // ALU second operand: 0 = reg, 1 = ???, 2 = PC, 3 = ??? .aluDest(aluDest_in), // 0 = reg, 1 = PC .aluCarrySource(aluCarrySource), // ALU carry input source: 0 = zero, 1 = one, 2 = carry flag, 3 = inverted carry flag @@ -83,8 +83,7 @@ module alu_stage ( wire [15:0] aluSrc2; assign aluSrc2 = - aluOpSource1_in == 2'h0 ? rf_dataB : - aluOpSource1_in == 2'h1 ? ~rf_dataIn : pc_in; + aluOpSource1_in == 2'h0 ? rf_dataB : pc_in; assign aluCarry_in = aluCarrySource[0] ^ (aluCarrySource[1] & statusReg[0]); -- cgit v1.2.3