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* widen register set control signal, fix bugs with conditional sets related to ...Nick McKinney2016-12-296-32/+32
* add simple control unitNick McKinney2016-12-183-5/+59
* Add ALU stage and hook it up. It sort of works.Nick McKinney2016-12-189-53/+429
* create super simple fetch stageNick McKinney2016-12-082-0/+35
* create decoder stageNick McKinney2016-12-082-1/+88
* finish decoder v1Nick McKinney2016-12-083-21/+175
* initial commitNick McKinney2016-12-0110-0/+601