rearrange some lines in project file

1 files changed, 2 insertions, 2 deletions

diff --git a/nqcpu.qsf b/nqcpu.qsf
index 7204a1d..54db45e 100644
--- a/nqcpu.qsf
+++ b/nqcpu.qsf
@@ -60,10 +60,10 @@ set_global_assignment -name VERILOG_FILE fetch_stage.v
 set_global_assignment -name VERILOG_FILE ctrl_decode.v
 set_global_assignment -name VERILOG_FILE ctrl_encode.v
 set_global_assignment -name VERILOG_FILE nqcpu.v
+set_global_assignment -name VERILOG_FILE alu_stage.v
+set_global_assignment -name VERILOG_FILE control_unit.v
 set_global_assignment -name VERILOG_FILE soc.v
 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name VERILOG_FILE alu_stage.v
-set_global_assignment -name VERILOG_FILE control_unit.v
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file