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authorNick McKinney <nick@kmonkey.net>2016-12-18 15:54:12 -0600
committerNick McKinney <nick@kmonkey.net>2016-12-18 15:54:12 -0600
commit9a8d8892361dcd16ad3801ce29e25516c8cd1019 (patch)
tree01f8cd27475fa5c9535b507d54eef7880f95a830 /nqcpu.qsf
parent603bee2b743f1a72222fd8586fa809555f08ea77 (diff)
Add ALU stage and hook it up. It sort of works.
Diffstat (limited to 'nqcpu.qsf')
-rw-r--r--nqcpu.qsf8
1 files changed, 6 insertions, 2 deletions
diff --git a/nqcpu.qsf b/nqcpu.qsf
index a96e544..d196471 100644
--- a/nqcpu.qsf
+++ b/nqcpu.qsf
@@ -38,7 +38,7 @@
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C20F484C7
-set_global_assignment -name TOP_LEVEL_ENTITY decoder_stage
+set_global_assignment -name TOP_LEVEL_ENTITY nqcpu
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:25:59 NOVEMBER 17, 2016"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
@@ -56,8 +56,12 @@ set_global_assignment -name VERILOG_FILE shifter.v
set_global_assignment -name VERILOG_FILE shifter_tb.v
set_global_assignment -name VERILOG_FILE alu_tb.v
set_global_assignment -name VERILOG_FILE decoder_stage.v
+set_global_assignment -name VERILOG_FILE fetch_stage.v
+set_global_assignment -name VERILOG_FILE ctrl_decode.v
+set_global_assignment -name VERILOG_FILE ctrl_encode.v
+set_global_assignment -name VERILOG_FILE nqcpu.v
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name VERILOG_FILE fetch_stage.v
+set_global_assignment -name VERILOG_FILE alu_stage.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file