| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | add initial zero values for registers | Nick McKinney | 2016-12-29 | 1 | -0/+11 |
| * | add simplistic status register and associated debug lines | Nick McKinney | 2016-12-29 | 2 | -3/+13 |
| * | widen register set control signal, fix bugs with conditional sets related to ... | Nick McKinney | 2016-12-29 | 6 | -32/+32 |
| * | add simple control unit | Nick McKinney | 2016-12-18 | 3 | -5/+59 |
| * | Add ALU stage and hook it up. It sort of works. | Nick McKinney | 2016-12-18 | 9 | -53/+429 |
| * | create super simple fetch stage | Nick McKinney | 2016-12-08 | 2 | -0/+35 |
| * | create decoder stage | Nick McKinney | 2016-12-08 | 2 | -1/+88 |
| * | finish decoder v1 | Nick McKinney | 2016-12-08 | 3 | -21/+175 |
| * | initial commit | Nick McKinney | 2016-12-01 | 10 | -0/+601 |
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index : nqcpu | |
| a small 16-bit cpu |
| summaryrefslogtreecommitdiff |