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* add containing SoC module, pull test program memory out of CPUNick McKinney2016-12-291-46/+28
* replace fetch_ready with a "wait needed" input lineNick McKinney2016-12-291-1/+1
* watch control lines from decoder instead of ALUNick McKinney2016-12-291-1/+1
* support setting PC for branch and jump instructionsNick McKinney2016-12-291-3/+14
* add simplistic status register and associated debug linesNick McKinney2016-12-291-2/+6
* widen register set control signal, fix bugs with conditional sets related to ...Nick McKinney2016-12-291-3/+3
* add simple control unitNick McKinney2016-12-181-5/+22
* Add ALU stage and hook it up. It sort of works.Nick McKinney2016-12-181-0/+158