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-rw-r--r--Makefile31
1 files changed, 31 insertions, 0 deletions
diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..12b015b
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,31 @@
+IV := iverilog
+IVFLAGS := -g2005-sv
+
+SIM_SRCS := $(wildcard *_tb.v)
+SIMS := $(SIM_SRCS:.v=.sim)
+WAVES := $(SIM_SRCS:.v=.vcd)
+
+DEPS = $(sort $(1) $(foreach d,$(1),$(DEPS-$(d))))
+DEPS-alu := $(call DEPS,shifter)
+DEPS-alu_stage := $(call DEPS,alu ctrl_decode)
+DEPS-decoder_stage := $(call DEPS,decoder ctrl_encode)
+DEPS-nqcpu := $(call DEPS,fetch_stage decoder_stage regFile alu_stage control_unit)
+DEPS-soc := $(call DEPS,nqcpu testROM ctrl_decode)
+
+all: simulate
+
+simulate: $(WAVES)
+
+clean:
+ rm -f $(SIMS) $(WAVES)
+
+%.vcd: %.sim
+ vvp $<
+
+.SECONDEXPANSION:
+pc := %
+%_tb.sim: %_tb.v %.v $$(patsubst $$(pc),$$(pc).v,$$(DEPS-$$*))
+ $(IV) $(IVFLAGS) -o $@ $^
+
+.PHONY: all simulate clean
+.SECONDARY: